PadDelay#

class PadDelay(fill_very_end=True)[source]#

Padding idle time with Delay instructions.

Consecutive delays will be merged in the output of this pass.

The ASAP-scheduled circuit output may become

     ┌────────────────┐
q_0: ┤ Delay(160[dt]) ├──■──
     └─────┬───┬──────┘┌─┴─┐
q_1: ──────┤ X ├───────┤ X ├
           └───┘       └───┘

Note that the additional idle time of 60dt on the q_0 wire coming from the duration difference between Delay of 100dt (q_0) and XGate of 160 dt (q_1) is absorbed in the delay instruction on the q_0 wire, i.e. in total 160 dt.

See BlockBasePadder pass for details.

Create new padding delay pass.

Parameters:: fill_very_end (bool) – Set True to fill the end of circuit with delay.

Attributes

`PadDelay.is_analysis_pass`	Check if the pass is an analysis pass.
`PadDelay.is_transformation_pass`	Check if the pass is a transformation pass.

Methods

`PadDelay.__call__`(circuit[, property_set])	Runs the pass on circuit.
`PadDelay.name`()	Return the name of the pass.
`PadDelay.run`(dag)	Run the padding pass on `dag`.
`PadDelay.__call__`(circuit[, property_set])	Runs the pass on circuit.